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| S3C9004/P9004/C9014/P9014 PRODUCT OVERVIEW 1 PRODUCT OVERVIEW SAM87RI PRODUCT FAMILY Samsung's SAM87RI family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range of integrated peripherals, and various mask-programmable ROM sizes. A dual address/data bus architecture and a large number of bit- or nibble-configurable I/O ports provide a flexible programming environment for applications with varied memory and I/O requirements. Timer/counters with selectable operating modes are included to support real-time operations. Many SAM87RI microcontrollers have an external interface that provides access to external memory and other peripheral devices. S3C9004/P9004/C9014/P9014 MICROCONTROLLER The S3C9004/P9004/C9014/P9014 single-chip 8-bit microcontroller is fabricated using an advanced CMOS process. It is built around the powerful SAM87RI CPU core. Stop and Idle power-down modes were implemented to reduce power consumption. To increase on-chip register space, the size of the internal register file was logically expanded. The S3C9004/P9004/C9014/P9014 has 4 K bytes of program memory on-chip. Using the SAM87RI design approach, the following peripherals were integrated with the SAM87RI core: -- Five configurable I/O ports (32 pins) -- 12 bit-programmable pins for external interrupts -- 8-bit timer/counter with three operating modes The S3C9004/P9004/C9014/P9014 is a versatile microcontroller that can be used in a wide range of general purpose applications. It is especially suitable for use as a keyboard controller and is available in a 40-pin DIP and a 44-pin QFP package. OTP The S3C9004/C9014 microcontroller is also available in OTP (One Time Programmable) version, S3P9004/P9014. S3P9004/P9014 microcontroller has an on-chip 8-Kbyte one-time-programmable EPROM instead of masked ROM. The S3P9004/P9014 is comparable to S3C9004/C9014, both in function and in pin configuration. 1-1 PRODUCT OVERVIEW S3C9004/P9004/C9014/P9014 FEATURES CPU * SAM87RI CPU core General I/O * * Memory * * * * 4-Kbyte internal program memory (ROM) 208-byte internal register file 8-Kbyte external program memory 8-Kbyte external data memory * * Five ports (32 pins total) Three bit-programmable ports (20 pins total) Two bit-programmable ports with external interrupts (12 pins total) Timer/Counter * One 8-bit basic timer for watchdog function and programmable oscillation stabilization interval generation function One 8-bit timer/counter with PWM mode Instruction Set * * 41 instructions IDLE and STOP instructions added for powerdown modes Operating Temperature Range * - 40C to + 85C Instruction Execution Time * 1.5 s at 4 MHz fOSC Operating Voltage Range * * 4.5 V to 5.5 V for S3C9004/P9004 2.7 V to 5.5 V for S3C9014/P9014 Interrupts * * 14 interrupt sources with one vector, Each source has its pending bit One level, one vector interrupt structure Package Types * 40-pin DIP Oscillation Circuit Options * 4 MHz RC oscillator with on chip capacitor for S3C9004/P9004 ( -10% RC accuracy at VDD 5% and Ta = 0C-70C, using 1% external precision resistor) RC oscillator for S3C9004/P9004 Crystal/ceramic oscillator for S3C9014/P9014 * * 1-2 S3C9004/P9004/C9014/P9014 PRODUCT OVERVIEW BLOCK DIAGRAM P0.0-P0.4/A8-A12, P0.5-P0.7 P1.0-P1.7/ AD0-AD7 P2.0-P2.7/INT, AS, DS , R/ W, DM PORT RESET VDD VSS1 XIN XOUT PORT PORT EA (TEST) VDD VSS1 P3.0 P3.1 P3.2 P3.3/CLO SAM87RI BUS MAIN OSC I/O PORT AND INTERRUPT CONTROL PORT Basic Timer SAM87RI CPU PORT Timer 0 208-BYTE REGISTER FILE P4.0/INT P4.1/INT/T0CLK P4.2/INT P4.3/INT/T0OUT 4-KB ROM Figure 1-1. Block Diagram 1-3 PRODUCT OVERVIEW S3C9004/P9004/C9014/P9014 PIN ASSIGNMENTS P3.0 INT/P4.0 T0CLK/INT/P4.1 INT/P4.2 T0OUT/INT/P4.3 AS/INT/P2.0 DS /INT/P2.1 R/ W/INT/P2.4 DM /INT/P2.3 INT/P2.4 INT/P2.5 INT/P2.6 INT/P2.7 NC VSS1 AD7/P1.7 AD6/P1.6 AD5/P1.5 AD4/P1.4 AD3/P1.3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 P3.1 P3.2 P3.3/CLO VDD P0.0/A8 P0.1/A9 P0.2/A10 P0.3/A11 P0.4/A12 P0.5 P0.6 P0.7 XOUT XIN RESET VSS2 EA P1.0/AD0 P1.1/AD1 P1.2/AD2 40-DIP (Top View) S3C9004/P9004 S3C9014/P9014 25 24 23 22 21 Figure 1-2. Pin Assignment Diagram (40-Pin DIP Package) 1-4 S3C9004/P9004/C9014/P9014 PRODUCT OVERVIEW PIN DESCRIPTIONS Table 1-1. S3C9004/P9004/C9014/P9014 Pin Descriptions Pin Names P0.0-P0.7 Pin Type I/O Pin Description Bit-programmable I/O port for Schmitt trigger input or open-drain output. Port0 can also be configured as external interface address lines A8A12. Bit-programmable I/O port for Schmitt trigger input, push-pull, or open-drain output. Port1 can alternatively be used as external interface address/data lines AD0-AD7. Bit-programmable I/O port for Schmitt trigger input or push-pull output. Port2 can be individually configured as external interrupt inputs. Especially, P2.0-2.3 can be configured for external bus control signal. Same general characteristics as Port1. Port3 are designed for to drive LED directly. P3.3 can be used to system clock output (CLO) port. Bit-programmable I/O port. Input mode or nchannel open-drain output mode is software assignable. Port4 can be individually configured as external interrupt inputs. Pull-up resistors are also software assignable. Especially, P4.1 can be used T0CLK input and P4.3 also T0OUT for Timer 0. System clock input and output pin (for RC oscillator, crystal/ceramic oscillator, or external clock source) External interrupt for bit-programmable port2 and port4 pins when set to input mode. RESET signal input pin. Schmitt trigger input with internal pull-up resistor. External Memory Access (EA) pin with 2 modes: 0V = Normal Operation Mode 5V = ROMLESS Operation Mode (Must be connected to VSS during normal operation mode) Power input pin Vss1 is a ground power for CPU core. Vss2 is a ground power for I/O and OSC block No connection (This pin would be better connecting to VSS) Circuit Number C Pin Numbers 36-29 Share Pins A8-A12 P1.0-P1.7 I/O C 23-16 AD0-AD7 P2.0-P2.7 I/O D 6-13 INT, AS, DS, R/W, DM P3.0-P3.3 I/O C 1, 40-38 P3.3/CLO P4.0-P4.3 I/O D 2-5 INT, T0CLK, T0OUT XIN, XOUT - - 27, 28 - INT RESET EA I I I - A B 2-13 26 24 PORT2/ PORT4 - - VDD VSS1, VSS2 NC - - - - - - 37 15, 25 14 - - - 1-5 PRODUCT OVERVIEW S3C9004/P9004/C9014/P9014 PIN CIRCUITS Table 1-2. Pin Circuit Assignments for the S3C9004/P9004/C9014/P9014 Circuit Number A B C D Circuit Type I I I/O I/O S3C9004/P9004/C9014/P9014 Assignments RESET signal input EA input Ports 0, 1, and 3 Ports 2 and 4 VDD IN PULL-UP RESISTOR IN Noise Filter 0 V = Internal ROM Access 5 V = External ROM Access Figure 1-3. Pin Circuit Type A (RESET RESET) Figure 1-4. Pin Circuit Type B (EA) VDD OUTPUT DATA OPEN DRAIN I/O OUTPUT DISABLE VSS INPUT DATA MUX D0 D1 MODE OUTPUT INPUT INPUT DATA D0 D1 Figure 1-5. Pin Circuit Type C (Ports 0, 1, and 3) 1-6 S3C9004/P9004/C9014/P9014 PRODUCT OVERVIEW VDD PULL-UP RESISTOR PULL-UP ENABLE VDD OUTPUT DATA OPEN DRAIN I/O OUTPUT DISABLE VSS INPUT DATA MUX D0 D1 MODE OUTPUT INPUT INPUT DATA D0 D1 Figure 1-6. Pin Circuit Type D (Ports 2 and 4) 1-7 PRODUCT OVERVIEW S3C9004/P9004/C9014/P9014 APPLICATION CIRCUIT 5V 5V VDD 0 PORT 3 1 PORT 0 2 3 PORT 1 EA 15 XIN R OSC XOUT S3C9004 S3P9004 0 1 RESET PORT 2 2 3 PORT 4 H O S T CLK DATA 7 VSS1 VSS2 KEYBOARD MATRIX Figure 1-7. Keyboard Control Application Circuit Diagram 1-8 S3C9004/P9004/C9014/P9014 ELECTRICAL DATA 12 OVERVIEW -- I/O capacitance ELECTRICAL DATA In this section, the following S3C9004/P9004/C9014/P9014 electrical characteristics are presented in tables and graphs: -- Absolute maximum ratings -- D.C. electrical characteristics -- A.C. electrical characteristics -- Input timing for RESET -- Input timing for external interrupts (ports 2 and 4, RESET, and EA) -- Oscillator characteristics -- Oscillation stabilization time -- Clock timing measurement points at XIN -- Data retention supply voltage in Stop mode -- Stop mode release timing when initiated by a reset -- Stop mode release timing when initiated by an external interrupt -- External Memory timing characteristics (8 MHz) -- External Memory Read and Write timing -- Characteristic curves 12-1 ELECTRICAL DATA S3C9004/P9004/C9014/P9014 Table 12-1. Absolute Maximum Ratings (TA = 25C) Parameter Supply Voltage Input Voltage Output Voltage Output Current High Output Current Low I OL Symbol VDD VIN VO I OH All input ports All output ports One I/O pin active All I/O pins active One I/O pin active Total pin current for ports 3 Total pin current for ports 0, 1, 2, 4 Operating Temperature Storage Temperature TA TSTG - - Conditions - Rating - 0.3 to + 6.5 - 0.3 to VDD + 0.3 - 0.3 to VDD + 0.3 - 18 - 60 + 25 + 100 + 100 - 40 to + 85 - 65 to + 150 C C Unit V V V mA mA Table 12-2. D.C. Electrical Characteristics (TA = - 40C to + 85C, VDD = 4.5 V to 5.5 V (1)) Parameter Input High Voltage Symbol VIH1 VIH2 Input Low Voltage VIL1 VIL2 Output High Voltage Output Low Voltage Output Low Current Input High Leakage Current VOH Conditions All inputs except VIH2 XIN All inputs except VIL2 XIN IOH = - 200 A All outputs except P4.1, P4.3, and port0 IOL = 2 mA All outputs except port3 VOL= 3 V Port3 only VIN = VDD All inputs except ILIH2, P4.0 and P4.1 VIN = VDD XIN, XOUT VDD - 1.0 - Min 0.8 VDD VDD - 0.5 - Typ - Max VDD VDD 0.2 VDD 0.4 - V V Unit V VOL IOL ILIH1 - 8 - - 15 - 0.4 23 3 V mA A ILIH2 20 12-2 S3C9004/P9004/C9014/P9014 ELECTRICAL DATA Table 12-2. D.C. Electrical Characteristics (Continued) (TA = - 40C to + 85C, VDD = 4.5 V to 5.5 V (1)) Parameter Input Low Leakage Current Symbol ILIL1 Conditions VIN = 0 V All inputs except ILIL2, P4.0 and P4.1 VIN = 0 V XOUT, XIN VOUT = VDD All outputs VOUT = 0 V All outputs VIN = 0 V; Port 2 only VIN = 0 V; Port 4 only VIN = 0 V; RESET only Normal operation mode 4 MHz CPU clock Idle mode; 4 MHz oscillator Stop mode - - 30 1.8 50 - - - 60 2.8 90 4.5 0.9 0.5 Min - Typ - Max -3 Unit A ILIL2 Output High Leakage Current Output Low Leakage Current Pull-up Resistors ILOH ILOL RL1 RL2 RL3 Supply Current (2) IDD1 IDD2 IDD3 - 20 3 -3 90 4.0 150 10 3 5 mA mA A A A K NOTES: 1. The operating voltage range of S3C9014/P9014 is from 2.7 V to 5.5 V according to oscillation frequency. 2. Supply current does not include current drawn through internal pull-up resistors or external output current loads. 12-3 S3C9004/P9004/C9014/P9014 ELECTRICAL DATA Table 12-3. Input/Output Capacitance (TA = - 40C to + 85C, VDD = 0 V) Parameter Input Capacitance Output Capacitance I/O Capacitance Symbol CIN COUT CIO Table 12-4. A.C. Electrical Characteristics (TA = - 40C to + 85C, VDD = 4.5 V to 5.5 V) Parameter Interrupt Input High, Low Width RESET Input Low Width Symbol tINTH, tINTL tRSL Conditions P2 and P4 RESET Min - - Typ 200 1,000 Max - - Unit ns Conditions f = 1 MHz; unmeasured pins are connected to VSS Min - Typ - Max 10 Unit pF t RSL RESET 0.2 V DD Figure 12-1. Input Timing for RESET 12-5 ELECTRICAL DATA S3C9004/P9004/C9014/P9014 tINTL tINTH 0.8 VDD 0.2 VDD Figure 12-2. Input Timing Measurement Points for Port 2, Port 4, and RESET Table 12-5. Oscillator Characteristics (TA = - 40C + 85C, VDD = 4.5 V to 5.5 V) Oscillator RC Oscillator (with Internal Capacitor; for S3C9004/P9004) Clock Circuit XIN R XOUT Test Condition VDD = 4.75 to 5.25 V TA = 0C + 70C Tolerance: 10% (note) Min - Typ 4 Max - Unit MHz Crystal/Ceramic Oscillator (for S3C9014/P9014) XIN C1 Crystal/Ceramic oscillation frequency 1.0 - 8.0 C2 XOUT NOTE: The S3C9004/P9004 provides an internal capacitor to accommodate an RC oscillator configuration. A 1% precision resistor must be used to achieve an oscillation frequency with an acceptable tolerance. 12-6 S3C9004/P9004/C9014/P9014 ELECTRICAL DATA CPU CLOCK 8 MHz 6 MHz 4 MHz 3 MHz 2 MHz 1 MHz 1 2 2.7 3 3.5 4 5 5.5 6 7 SUPPLY VOLTAGE (V) Figure 12-3. Operating Voltage Range (S3C9014/P9014) 12-7 S3C9004/P9004/C9014/P9014 ELECTRICAL DATA Table 12-6. Oscillation Stabilization Time (TA = - 40C + 85C, VDD = 4.5 V to 5.5 V) Oscillator Main Crystal Main Ceramic Oscillator Stabilization Wait Time Test Condition f OSC = 4 MHz (Oscillation stabilization occurs when VDD is equal to the minimum oscillator voltage range.) tWAIT stop mode release time by a reset Min - Typ - Max 10 Unit ms - 216 / f OSC (note) - tWAIT stop mode release time by an interrupt - - NOTE: The oscillator stabilization wait time, tWAIT, is determined by the setting in the basic timer control register, BTCON. 1 / f OSC t XL t XH XIN VDD - 0.5 V 0.4 V Figure 12-4. Clock Timing Measurement Points at XIN Table 12-7. Data Retention Supply Voltage in Stop Mode (TA = - 40C + 85C) Parameter Data Retention Supply Voltage Data Retention Supply Current Symbol VDDDR IDDDR Conditions Stop mode Stop mode; VDDDR = 2.0 V Min 2.0 - Typ - - Max 6 5 Unit V A 12-9 ELECTRICAL DATA S3C9004/P9004/C9014/P9014 INTERNAL RESET OPERATION STOP MODE DATA RETENTION MODE VDDDR EXECUTION OF STOP INSTRUCTION RESET 0.2 V DD t WAIT ~ ~ IDLE MODE (BASIC TIMER ACTIVE) VDD ~ ~ NORMAL OPERATING MODE 0.8 V DD Figure 12-5. Stop Mode Release Timing When Initiated by a Reset STOP MODE DATA RETENTION MODE VDDDR VDD ~ ~ ~ ~ IDLE MODE (BASIC TIMER ACTIVE) EXECUTION OF STOP INSTRUCTION EXTERNAL INTERRUPT 0.8 V DD NORMAL OPERATING MODE 0.2 V DD t WAIT Figure 12-6. Stop Mode Release Timing When Initiated by an External Interrupt 12-10 S3C9004/P9004/C9014/P9014 ELECTRICAL DATA Table 12-8. External Memory Timing Characteristics (4 MHz) (TA = - 40C to + 85C, VDD = 4.5 V to 5.5 V) Number 1 2 3 4 5 6a 6b 7 8 9 10 11 12 13 Symbol tdA (AS) tdAS (A) tdAS (DR) twAS tdA (DS) twDS (read) twDS (write) tdDS (DR) thDS (DR) tdDS (A) tdDS (AS) tdDO (DS) tdRW (AS) tdDS (DW) Parameter Address valid to AS delay AS to address float delay AS to read data required valid AS Low width Address float to DS DS (read) Low width DS (write) Low width DS to read data required valid Read data to DS hold time DS to address active delay DS to AS delay Write data valid to DS (write) delay R/W valid to AS delay DS to write data not valid delay Normal Timing (ns) Min 10 35 - 88 0 314 164 - 0 20 30 10 20 20 Max - - 140 - - - - 80 - - - - - - NOTES: 1. All times are in nano seconds (ns) and assume an 4 MHz input frequency. 2. Wait states add 100 ns to the time of numbers 3, 6a, 6b, and 7. 12-11 ELECTRICAL DATA S3C9004/P9004/C9014/P9014 R/ W (P2.2) 12 PORT0 DM (P2.3) A8-A12, DM 3 9 PORT1 1 A0-A7 2 11 D0-D7 OUT D0-D7 IN OUT 10 AS (P2.0) 4 5 8 7 DS (P2.1) 6 13 Figure 12-7. External Memory Read and Write Timing (See Table 12-8 for a description of each timing point.) 12-12 S3C9004/P9004/C9014/P9014 ELECTRICAL DATA CHARACTERISTIC CURVES NOTE The characteristic values shown in the following graphs are based on actual test measurements. They do not, however, represent guaranteed operating values. (TA = 25 C) 7 6 5 4 3 2 1 0 f OSC = 5 MHz f OSC = 10 MHz f OSC = 8 MHz I DD1 (mA) f OSC = 2 MHz f OSC = 1 MHz ~ ~ 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 VDD (V) Figure 12-8. IDD1 vs. VDD 12-13 ELECTRICAL DATA S3C9004/P9004/C9014/P9014 (TA = 25 C) 1400 1200 f OSC f OSC f OSC f OSC = 10 MHz = 5,8 MHz = 1 MHz = 2 MHz 1000 800 I DD2 (A) 600 400 200 0 ~ ~ 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 VDD (V) Figure 12-9. IDD2 vs. VDD 12-14 S3C9004/P9004/C9014/P9014 ELECTRICAL DATA (TA = 25 C) 750 700 650 600 I DD3 (nA) 550 f OSC = 5 MHz 500 450 400 0 ~ ~ 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 VDD (V) Figure 12-10. IDD3 vs. VDD 6 5 4 VOH (V) 3 2 1 0 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 VDD = 4.5V VDD = 5.0V VDD = 5.5V IOH (mA) Figure 12-11. IOH vs. VOH 12-15 ELECTRICAL DATA S3C9004/P9004/C9014/P9014 7 6 5 VOL (V) 4 3 VDD = 4.5V 2 1 VDD = 5.0V VDD = 5.5V 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 IOL (mA) Figure 12-12. VOL vs. IOL (Port 0, 1, 2, and 4) 7 6 5 VOL (V) 4 VDD = 4.5V 3 2 VDD = 5.5V 1 VDD = 5.0V 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 IOL (mA) Figure 12-13. VOL vs. IOL (Port 3) 12-16 S3C9004/P9004/C9014/P9014 MECHANICAL DATA 13 OVERVIEW #40 13.85 0.2 MECHANICAL DATA The S3C9004/P9004/C9014/P9014 is currently available in a 40-pin DIP package. #21 0-15 40-DIP-600B 15.24 #1 #20 3.95 0.2 52.42 0.2 0.46 0.1 (2.00) 1.27 0.1 2.54 NOTE: Dimensions are in millimeters. Figure 13-1. 40-Pin DIP Package Mechanical Data (40-DIP-600B) 3.30 0.3 0.51MIN 5.08MAX 52.82 MAX 0.25 +0.1 - 0.05 13-1 MECHANICAL DATA S3C9004/P9004/C9014/P9014 NOTES 13-2 |
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